A Novel Design of Reversible Serial and Parallel Adder/subtractor
نویسنده
چکیده
Under ideal conditions, Reversible logic gates produce zero power dissipation. So these can be used for low power VLSI design. This paper proposes a new reversible parallel adder/subtractor using 4*4 Reversible DKG gate that can work singly as a reversible full adder and a full subtractor. A serial adder/subtractor is also designed in this paper using Reversible Universal Shift registers and DKG gate. This paper provides a threshold to build more complex arithmetic systems using reversible logic.
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